10M/100M以太网PHY收发器SR8201G

 

general description  features 

the sr8201g are single-chip/port 10/100mbps ethernet  ?  supports ieee 802.3az-2010 (eee) 

phyceiver  with  rmii  interface  (reduced  media  ?  100base-tx ieee 802.3u compliant 

independent interface).  ?  10base-t ieee 802.3 compliant 

  ?  supports rmii mode 

the sr8201g implement all 10/100m ethernet physical- ?  full/half duplex operation 

layer functions including the physical coding sublayer  ?  supports power down mode 

(pcs), physical medium attachment (pma), twisted pair  ?  supports interrupt function 

physical  medium  dependent  sublayer  (tp-pmd),  ?  automatic polarity correction 

10base-tx  encoder/decoder,  and  twisted-pair  media  ?  provide two network status leds 

access unit (tpmau).   ?  supports 25mhz external crystal or osc 

  ?  supports 50mhz external osc clock input for 

the  chip  utilizes  an  advanced  cmos  process  to   rmii 

meet  low  voltage  and  low power  re  with   ?  provides 50mhz clock source for mac 

on-chip  dsp  (digital  signal  processing)  technology,   ?  single-supply 3.3v cmos technology with on-

the    chip    provides  excellent  performance  under  all  chip 1.8v regulator 

operating conditions.  ?  small package:  

  ?  fn ‘green’ package 

   

 

application 

?  mau (media access unit) 

?  dtv (digital tv) 

?  cnr (communication and network riser) 

?  game console 

?  printer and office machine 

?  dvd player and recorder 

?  ethernet hub 

?  ethernet switch